Re: [RFC PATCH v1 0/5] hw/gpio: STM32F1xx GPIO controller in Rust

Hi all, sorry for pre wrong link with patch 5,now I add right link(rfc) below, really sorry  for my mistake

A polite ping for this RFC series.Thanks advice for Philippe advice and I am ready for v2.
Could anyone have other suggestions for my patch. I am appreciative for your advice and ready to fix it in v2


> 2026年7月26日 22:51，Jack Wang <[email protected]> 写道：
> 
> Hi all,
> 
> This RFC adds an STM32F1xx GPIO controller modelled in Rust, following the
> existing rust/hw/char/pl011 device as a template. The register logic (CRL/CRH
> mode+config decode and the IDR update algorithm) is a direct port of the C
> model in hw/gpio/stm32l4x5_gpio.c; the STM32F1xx GPIO block (RM0008) is the
> same IP used by the upstream stm32f100_soc.
> 
> This series is currently stacked on an out-of-tree STM32F103 SoC and board
> that are not yet upstream which is https://github.com/shandianchengzi/qemu
> But the commit(the initialize logic and gpio architecture) is both capable 
> for stm32f100.This is the reason that struct name is  stm32f1xx. Patch 3 
> ("hw/arm/stm32f103: instantiate and mapGPIO ports") therefore touches files 
> that do not exist in mainline and willnot apply cleanly on its own. 
> I am sending this as an RFC to get feedback onthe Rust device model and 
> its integration now, before the SoC lands, rather than as an apply-ready series
> . Once the SoC is upstream (or if you I
> can retarget the device at the existing stm32f100_soc), I will resend a
> non-RFC series.
> 
> checkpatch reports SPDX warnings on Kconfig/trace-events/Cargo.toml/
> meson.build and "MAINTAINERS need updating" on the new files. These are
> false positives: matching rust/hw/char/pl011, these file types carry no SPDX
> header in-tree, and MAINTAINERS already gains an entry covering rust/hw/gpio/
> and the qtest in this series.
> 
> Anyway this is my first time to generate rust model build so sorry for some
> mistakes. And any help or tip are welcomed
> 
> Jack Wang (5):
>  hw/gpio: add stm32f1xx GPIO device model (Rust)
>  rust: add hw/gpio crate to the workspace
>  hw/arm/stm32f103: instantiate and map GPIO ports
>  tests/qtest: add stm32f103 GPIO test
>  rust/hw/gpio: add native unit tests
> 
> MAINTAINERS                       |   7 +
> hw/arm/Kconfig                    |   1 +
> hw/arm/stm32f103_board.c          |   2 +-
> hw/arm/stm32f103_soc.c            |  54 ++-
> hw/gpio/Kconfig                   |   5 +
> hw/gpio/trace-events              |   7 +
> include/hw/arm/stm32f103_soc.h    |   9 +
> rust/Cargo.lock                   |  17 +-
> rust/Cargo.toml                   |  18 +
> rust/hw/Kconfig                   |   1 +
> rust/hw/gpio/Cargo.toml           |  28 ++
> rust/hw/gpio/Kconfig              |   2 +
> rust/hw/gpio/meson.build          |  54 +++
> rust/hw/gpio/src/bindings.rs      |  19 ++
> rust/hw/gpio/src/gpio.rs          | 539 ++++++++++++++++++++++++++++++
> rust/hw/gpio/src/lib.rs           |   3 +
> rust/hw/gpio/tests/tests.rs       | 191 +++++++++++
> rust/hw/meson.build               |   1 +
> tests/qtest/meson.build           |   4 +
> tests/qtest/stm32f103_gpio-test.c | 328 ++++++++++++++++++
> 20 files changed, 1281 insertions(+), 9 deletions(-)
> create mode 100644 rust/hw/gpio/Cargo.toml
> create mode 100644 rust/hw/gpio/Kconfig
> create mode 100644 rust/hw/gpio/meson.build
> create mode 100644 rust/hw/gpio/src/bindings.rs
> create mode 100644 rust/hw/gpio/src/gpio.rs
> create mode 100644 rust/hw/gpio/src/lib.rs
> create mode 100644 rust/hw/gpio/tests/tests.rs
> create mode 100644 tests/qtest/stm32f103_gpio-test.c
> 
> -- 
> 2.53.0
>