[PATCH] ARM: dts: aspeed: anacapa: add JTAG CPLD TRST pin to SGPIO map
Colin Huang via B4 Relay <[email protected]>
| Newsgroups | org.ozlabs.lists.linux-aspeed,org.infradead.lists.linux-arm-kernel,org.kernel.feeds.b4-sent,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
From: Colin Huang <[email protected]> Add JTAG_CPLD_TRST_R_N to the sgpiom0 pin name table on Facebook Anacapa BMC. This exposes the CPLD JTAG TRST signal through SGPIO, allowing proper JTAG reset control during debug. Signed-off-by: Colin Huang <[email protected]> --- Add JTAG_CPLD_TRST_R_N to the SGPIO M0 pin name table on Facebook Anacapa BMC. This exposes the CPLD JTAG TRST signal through SGPIO, allowing proper JTAG reset control during debug. --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts index 2cb7bd128d24..9a43e0c87257 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts @@ -882,7 +882,7 @@ &sgpiom0 { /* C0-C7 line 32-47 */ "RSVD_RMC_GPIO3", "", "", "", "", "", "", "", - "LEAK_DETECT_RMC_N", "", "", "", + "LEAK_DETECT_RMC_N", "JTAG_CPLD_TRST_R_N", "", "", "", "", "", "", /* D0-D7 line 48-63 */ --- base-commit: b333a0f1c857411d83a02aa6f1d9ecc7666d6179 change-id: 20260511-add-jtag-trst-pin-540b7d84ae2c Best regards, -- Colin Huang <[email protected]>