Re: [PATCH] ARM: dts: aspeed: anacapa: add JTAG CPLD TRST pin to SGPIO map
Andrew Jeffery <[email protected]>
| Newsgroups | org.ozlabs.lists.linux-aspeed,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
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| Message-ID | <177908116750.1269230.16667761190075154399.b4-ty@b4> |
On Mon, 11 May 2026 17:47:56 +0800, Colin Huang wrote: > Add JTAG_CPLD_TRST_R_N to the sgpiom0 pin name table on > Facebook Anacapa BMC. > > This exposes the CPLD JTAG TRST signal through SGPIO, > allowing proper JTAG reset control during debug. > > > [...] Thanks, I've applied this to the BMC tree. -- Andrew Jeffery <[email protected]>