Re: [PATCH v1 2/2] soc: aspeed: add host-side PCIe BMC device driver
Andrew Jeffery <[email protected]>
| Newsgroups | org.ozlabs.lists.linux-aspeed,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <b45e426913823946871d429d24eeb955718464ae.camel@codeconstruct.com.au> |
On Wed, 2026-06-03 at 16:30 +0200, Andrew Lunn wrote: > On Wed, Jun 03, 2026 at 03:43:36PM +0200, Grégoire Layet wrote: > > > How virtual is this? Is this directly accessing the hardware via > > > shared memory? Or is there software on the BMC which traps these > > > reads/writes and responds? > > > > The VUART is virtual because there is no physical UART link between > > the host and the BMC. > > Instead, the AST2600 exposes a 16550-compatible register set on both > > sides (BMC APB and PCIe host MMIO). > > The data flows using an internal 16 byte FIFO shared between the two > > register views. > > So it's hardware emulated and there is no software in the data path. > > > > The AST2600 has four VUARTs, two of which are accessible via PCIe MMIO. > > This is based on the following section of the AST2600 datasheet: > > III.48 VUART and III.64 PCI2VUART. > > > > Because the silicon presents a standard 16550A interface in hardware, > > the existing 8250 driver works without modification. > > So tell us about security. > > Is only this UART exposed in the shared memory? > No, however the BMC PCI interface provides a PCI-to-LPC bridge, so PCI accesses can drive cycles in to e.g LPC IO devices exposed by the BMC. > So the memory window > is 8 bytes wide? Or are there other peripherals also exposed? How do > we know the aspeed is not using the UART itself? > For the "regular" SuperIO-controlled UARTs this is a concern, but it's not a concern for the VUARTs. Each VUART has a pair of 8250 register sets, one accessible from the BMC, the other accessible to the host, where both interfaces share the FIFOs to propagate data. > If two drivers are > using it, are we going to crash one or the other system? By the above, not for the VUARTs. > > https://en.wikipedia.org/wiki/Core_War > > The advantage of rpmsg is that the aspeed would advertise what > services it is willing to expose. The security issues are different, > implementation bugs vs exposing bits of hardware to an attacker. From my understanding rpmsg seems like a reasonable fit for the mailbox functionality. Andrew