Re: [PATCH v2 2/2] ARM: dts: aspeed-g6: add pcie-kcs4

Hi Gr=C3=A9goire,

On Thu, 2026-07-23 at 09:56 +0200, Gr=C3=A9goire Layet wrote:
> Hi Andrew,
>=20
> > > =C2=A0arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 7 +++++++
> > > =C2=A01 file changed, 7 insertions(+)
> > >=20
> > > diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/=
dts/aspeed/aspeed-g6.dtsi
> > > index 56bb3b0444f7..a93fa4cf5d8f 100644
> > > --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > > +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > > @@ -617,6 +617,13 @@ kcs4: kcs@114 {
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0 status =3D "disabled";
> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 };
> > >=20
> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 pcie_kcs4: kcs@914 {
> >=20
> > Nodes need to be ordered by ascending address:
>=20
> The existing kcs4 node is already not in ascending order of address.
>=20
> 'kcs4: kcs@114' is before 'lpc_ctrl: lpc-ctrl@80'
>=20
> pcie_kcs4 has been placed here to have ascending addresses locally on
> the kcs nodes and still
> having all the kcs nodes next to each other. This matches the kcs4
> node ordering.

Understood, however:

>=20
> If ascending address is still preferred, I'll change pcie_kcs4 order of c=
ourse.

My preference is that we don't add further style problems on top of
those we already have :)

Thanks,

Andrew