Re: [PATCH v2 3/4] powerpc: Add Power12 architected mode

On 2026/08/03 09:27 PM, Mahesh Salgaonkar wrote:
> From: "Ritesh Harjani (IBM)" <[email protected]>
> 
> PVR value of 0x0f000008 means we are arch v3.2 compliant (i.e.
> Power12). This is used by phyp and kvm when booting as a pseries guest
> to detect the presence of new Power12 features and to enable the
> appropriate hwcap and facility bits.
> 
> Signed-off-by: Nicholas Piggin <[email protected]>
> Signed-off-by: Ritesh Harjani (IBM) <[email protected]>
> Signed-off-by: Mahesh Salgaonkar <[email protected]>
> Tested-by: Praveen K Pandey <[email protected]>
> Reviewed-by: Nikhil Kumar Singh <[email protected]>
> ---
>  arch/powerpc/include/asm/prom.h           |  1 +
>  arch/powerpc/include/uapi/asm/cputable.h  |  1 +
>  arch/powerpc/kernel/cpu_specs_book3s_64.h | 14 ++++++++++++++
>  arch/powerpc/kernel/prom_init.c           | 12 ++++++++++--
>  4 files changed, 26 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
> index f4991d10d89ec..cd025c7225ee7 100644
> --- a/arch/powerpc/include/asm/prom.h
> +++ b/arch/powerpc/include/asm/prom.h
> @@ -118,6 +118,7 @@ extern unsigned int boot_cpu_node_count;
>  
>  #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
>  #define OV1_PPC_3_1			0x40	/* set if we support PowerPC 3.1 */
> +#define OV1_PPC_3_2			0x20	/* set if we support PowerPC 3.2 */

Minor: OV1_PPC_3_1 and OV1_PPC_3_2 use extra tabs relative to OV1_PPC_3_00.
This is pre-existing style inconsistency in the file (not introduced by
this patch) but new additions should match the surrounding code. Please
consider aligning them.

Thanks,
Amit

>  
>  /* Option vector 2: Open Firmware options supported */
>  #define OV2_REAL_MODE		0x20	/* set if we want OF in real mode */
> diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h
> index bc9bd225f5876..68215b7ce67e6 100644
> --- a/arch/powerpc/include/uapi/asm/cputable.h
> +++ b/arch/powerpc/include/uapi/asm/cputable.h
> @@ -53,6 +53,7 @@
>  #define PPC_FEATURE2_ARCH_3_1		0x00040000 /* ISA 3.1 */
>  #define PPC_FEATURE2_MMA		0x00020000 /* Matrix Multiply Assist */
>  #define PPC_FEATURE2_ARCH_3_2		0x00010000 /* ISA 3.2 */
> +#define PPC_FEATURE2_DMF		0x00008000 /* Dense Math Facility */
>  
>  /*
>   * IMPORTANT!
> diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h
> index 7619dd157646f..26fa40aa34db2 100644
> --- a/arch/powerpc/kernel/cpu_specs_book3s_64.h
> +++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h
> @@ -303,6 +303,20 @@ static struct cpu_spec cpu_specs[] __initdata = {
>  		.cpu_restore		= __restore_cpu_power10,
>  		.platform		= "power11",
>  	},
> +	{	/* 3.2-compliant processor, i.e. Power12 "architected" mode */
> +		.pvr_mask		= 0xffffffff,
> +		.pvr_value		= 0x0f000008,
> +		.cpu_name		= "Power12 (architected)",
> +		.cpu_features		= CPU_FTRS_POWER12,
> +		.cpu_user_features	= COMMON_USER_POWER12,
> +		.cpu_user_features2	= COMMON_USER2_POWER12,
> +		.mmu_features		= MMU_FTRS_POWER12,
> +		.icache_bsize		= 128,
> +		.dcache_bsize		= 128,
> +		.cpu_setup		= __setup_cpu_power12,
> +		.cpu_restore		= __restore_cpu_power12,
> +		.platform		= "power12",
> +	},
>  	{	/* Power7 */
>  		.pvr_mask		= 0xffff0000,
>  		.pvr_value		= 0x003f0000,
> diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
> index 6b50870759fd9..7ebfe048f97a2 100644
> --- a/arch/powerpc/kernel/prom_init.c
> +++ b/arch/powerpc/kernel/prom_init.c
> @@ -953,7 +953,7 @@ struct option_vector7 {
>  } __packed;
>  
>  struct ibm_arch_vec {
> -	struct { __be32 mask, val; } pvrs[16];
> +	struct { __be32 mask, val; } pvrs[18];
>  
>  	u8 num_vectors;
>  
> @@ -1021,6 +1021,14 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
>  			.mask = cpu_to_be32(0xffff0000), /* POWER11 */
>  			.val  = cpu_to_be32(0x00820000),
>  		},
> +		{
> +			.mask = cpu_to_be32(0xffff0000), /* POWER12 */
> +			.val  = cpu_to_be32(0x00830000),
> +		},
> +		{
> +			.mask = cpu_to_be32(0xffffffff), /* all 3.2-compliant */
> +			.val  = cpu_to_be32(0x0f000008),
> +		},
>  		{
>  			.mask = cpu_to_be32(0xffffffff), /* P11 compliant */
>  			.val  = cpu_to_be32(0x0f000007),
> @@ -1054,7 +1062,7 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
>  		.byte1 = 0,
>  		.arch_versions = OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
>  				 OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06 | OV1_PPC_2_07,
> -		.arch_versions3 = OV1_PPC_3_00 | OV1_PPC_3_1,
> +		.arch_versions3 = OV1_PPC_3_00 | OV1_PPC_3_1 | OV1_PPC_3_2,
>  	},
>  
>  	.vec2_len = VECTOR_LENGTH(sizeof(struct option_vector2)),
> -- 
> 2.55.0
> 
>