[PATCH 3/3] ARM: dts: nuvoton: Add OTP nodes for NPCM7xx
Kuan-Wei Chiu <[email protected]>
| Newsgroups | org.ozlabs.lists.openbmc,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add device tree nodes for the OTP memory controllers found on Nuvoton NPCM7xx SoCs. The controllers (Key Storage and Fuse Array) are attached to the APB bus. Since they are internal SoC components with no board-level dependencies, they are enabled by default. Signed-off-by: Kuan-Wei Chiu <[email protected]> --- arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi index ab3c3c5713ae..8a28b1f8a4fd 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi @@ -480,6 +480,16 @@ &fanin12_pins &fanin13_pins status = "disabled"; }; + otp1: otp@189000 { + compatible = "nuvoton,npcm750-key-storage"; + reg = <0x189000 0x1000>; + }; + + otp2: otp@18a000 { + compatible = "nuvoton,npcm750-fuse-array"; + reg = <0x18a000 0x1000>; + }; + i2c0: i2c@80000 { reg = <0x80000 0x1000>; compatible = "nuvoton,npcm750-i2c"; -- 2.53.0.851.ga537e3e6e9-goog