Re: [PATCH v8 0/3] pinctrl: aspeed: Add AST2700 SoC0 support

Billy Tsai <[email protected]> Wed, 29 Apr 2026 09:44:22 +0000

Newsgroups	org.ozlabs.lists.openbmc,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel,org.ozlabs.lists.linux-aspeed
Message-ID	<OSQPR06MB7252D2B3558B5714887600ED8B342@OSQPR06MB7252.apcprd06.prod.outlook.com>

> > AST2700 is composed of two interconnected SoC instances, each providing
> > its own pin control hardware. This series introduces bindings describing
> > the AST2700 pinctrl architecture and adds pinctrl driver support for the
> > SoC0 instance.
> >
> > The bindings document the AST2700 dual-SoC design and follow common
> > pinctrl conventions, while the SoC0 driver implementation builds upon
> > the existing ASPEED pinctrl infrastructure.
> >
> > ---

> Why is this being Cc'ed to linux-clk? I'm hoping it's a manual typo and
> not some sort of misconfiguration in ./scripts/get_maintainer.pl,
> please?

This was automatically added by b4 prep --auto-to-cc. According to the
output of ./scripts/get_maintainer.pl for the patch `[PATCH 2/3]
dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0`,
[email protected] is included in the Cc list.

Thanks

Billy Tsai