Re: [PATCH u-boot] ARM: dts: aspeed: Add Nvidia VR-NVL BMC
Tan Siewert <[email protected]> Thu, 25 Jun 2026 10:37:14 +0200
| Newsgroups | org.ozlabs.lists.openbmc |
|---|---|
| Message-ID | <[email protected]> |
On 6/24/26 7:20 PM, Jacky Huang wrote:
> Adds a dts for the NVIDIA VR-NVL BMC board, an AST2600-based BMC for
> the Vera Rubin NVL platform.
>
> MAC0 uses phy-mode = "rgmii-id" with no SoC-side clk-delay node, so it
> relies on the zero default introduced by commit 3f6198c0db1c ("clk:
> ast2600: set default clk-delay for all ethernet macs to 0"). With that
> change in place, MAC0 brings up its MDIO bus and establishes a link
> with the on-board PHY.
>
> Signed-off-by: Jacky Huang <[email protected]>
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/ast2600-vr-bmc-nvidia.dts | 222 +++++++++++++++++++++++++
> 2 files changed, 223 insertions(+)
> create mode 100644 arch/arm/dts/ast2600-vr-bmc-nvidia.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index fa6837be74..4db765dd83 100755
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> ast2600-fpga.dtb \
> ast2600-gb200nvl-bmc-nvidia.dtb \
> ast2600-msx4-bmc-nvidia.dtb \
> + ast2600-vr-bmc-nvidia.dtb \
Sort alphabetically (i.e. after ast2600-intel.dtb)
> ast2600-greatlakes.dtb \
> ast2600-intel.dtb \
> ast2600-intel.dtb \
> diff --git a/arch/arm/dts/ast2600-vr-bmc-nvidia.dts b/arch/arm/dts/ast2600-vr-bmc-nvidia.dts
> new file mode 100644
> index 0000000000..f8856b1e59
> --- /dev/null
> +++ b/arch/arm/dts/ast2600-vr-bmc-nvidia.dts
> @@ -0,0 +1,222 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +
> +#include "ast2600-u-boot.dtsi"
> +
> +/ {
> + model = "AST2600 VR-NVL BMC";
> + compatible = "nvidia,vr-nvl-bmc", "aspeed,ast2600";
> +
> + memory {
> + device_type = "memory";
> + reg = <0x80000000 0x40000000>;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + };
> +
> + aliases {
> + mmc0 = &emmc_slot0;
> + mmc1 = &sdhci_slot0;
> + mmc2 = &sdhci_slot1;
Do you use those on real hardware? If so, then you must enable them too.
> + spi0 = &fmc;
> + spi1 = &spi1;
> + spi2 = &spi2;
> + ethernet0 = &mac0;
> + ethernet1 = &mac1;
> + ethernet2 = &mac2;
> + ethernet3 = &mac3;
ethernet1, 2, and 3 are not enabled. No need to give them an alias.
> + };
> +
> + cpus {
> + cpu@0 {
> + clock-frequency = <800000000>;
> + };
> + cpu@1 {
> + clock-frequency = <800000000>;
> + };
> + };
> +};
> +
> +&uart5 {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> +&sdrammc {
> + clock-frequency = <400000000>;
> + aspeed,ecc-enabled;
> + aspeed,ecc-size-mb = <0>;
aspeed,ecc-size-mb defaults to 0, no need to set it explicitly:
$ grep -A2 -B3 aspeed,ecc-size-mb drivers/ram/aspeed/sdram_ast2600.c
if (dev_read_bool(dev, "aspeed,ecc-enabled")) {
u32 ecc_size;
ecc_size = dev_read_u32_default(dev,
"aspeed,ecc-size-mb", 0);
ast2600_sdrammc_ecc_enable(priv, ecc_size);
}
> +};
> +
> +&wdt1 {
> + status = "okay";
> +};
> +
> +&wdt2 {
> + status = "okay";
> +};
> +
> +&wdt3 {
> + status = "okay";
> +};
> +
> +&mdio {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_mdio1_default>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy0: ethernet-phy@0 {
> + reg = <0>;
> + };
> +};
> +
> +&mac0 {
> + status = "okay";
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii1_default>;
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fmcquad_default>;
> +
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
Compatible is unnecessary for all flash nodes. It defaults to
"jedec,spi-nor" which is also a valid compatible in sf_probe.c.
Also, sst,w25q256 does not exist as compatible in this u-boot tree.
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@1 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@2 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + num-cs = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
> + &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
> + &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
> +
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +
> + flash@1 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "disabled";
This node is disabled by default. No need to define it then.
Tan
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> +&spi2 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
> + &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
> + num-cs = <1>;
> + flash@0 {
> + compatible = "spi-flash", "sst,w25q256";
> + status = "okay";
> + spi-max-frequency = <50000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +