Re: [PATCH] dt-bindings: usb: Add Aspeed AST2700 DWC3 controller

Krzysztof Kozlowski <[email protected]> Wed, 8 Jul 2026 12:48:00 +0200

Newsgroups	org.ozlabs.lists.openbmc,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-usb,org.ozlabs.lists.linux-aspeed
Message-ID	<20260708-crafty-copperhead-of-whirlwind-1d89e9@quoll>

On Tue, Jul 07, 2026 at 02:12:04PM +0800, Ryan Chen wrote:
> The Aspeed AST2700 SoC integrates the Synopsys DesignWare USB3 core with
> no vendor glue logic: it is functionally compatible with snps,dwc3, uses
> the standard DWC3 clocks, and the only SoC-specific part is a USB3 PHY
> that is handled by a separate driver.
> 
> Add a dedicated binding document rather than adding the compatible and a
> conditional to snps,dwc3.yaml. This follows the established per-vendor DWC3
> convention (apple,dwc3.yaml, socionext,uniphier-dwc3.yaml, ...) and keeps
> the AST2700-specific constraints - notably the mandatory USB3 PHY - out of
> the generic schema.
> 
> Signed-off-by: Ryan Chen <[email protected]>
> ---

Why are clocks unconstrained?

Best regards,
Krzysztof