[PATCH 02/17] spi: cadence_qspi: enable clock

On certain devices (such as Renesas RZ/N1) it is necessary to
enable the clock before accessing the QSPI controller registers.

Signed-off-by: Ralph Siemsen <[email protected]>
---
 drivers/spi/cadence_qspi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 984d4a39ded..c383caec6dd 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -253,6 +253,7 @@ static int cadence_spi_probe(struct udevice *bus)
 			priv->ref_clk_hz = clk_get_rate(&clk);
 			if (IS_ERR_VALUE(priv->ref_clk_hz))
 				return priv->ref_clk_hz;
+			clk_enable(&clk);
 		}
 	}
 

-- 
2.55.0