[PATCH 3/4] arm: dts: ax3005: Add SDHCI, eMMC PHY and clock node
Siu Ming Tong <[email protected]>
| Newsgroups | org.u-boot-project.lists.u-boot |
|---|---|
| Message-ID | <[email protected]> |
Add device tree nodes for the Arasan SDHCI controller and the eMMC PHY on the AX3005 SoC, together with the supporting fixed clock (clk_xin), in ax3005.dtsi. Enable the SDHCI node in ax3005-scm3005.dts for the SCM3005 board. Signed-off-by: Siu Ming Tong <[email protected]> --- arch/arm/dts/ax3005-scm3005.dts | 4 ++++ arch/arm/dts/ax3005.dtsi | 25 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm/dts/ax3005-scm3005.dts b/arch/arm/dts/ax3005-scm3005.dts index b684602176c..3ef60b0b36c 100644 --- a/arch/arm/dts/ax3005-scm3005.dts +++ b/arch/arm/dts/ax3005-scm3005.dts @@ -26,3 +26,7 @@ &uart3 { status = "okay"; }; + +&sdhci0 { + status = "okay"; +}; diff --git a/arch/arm/dts/ax3005.dtsi b/arch/arm/dts/ax3005.dtsi index 6df2e4a821c..7c84675169e 100644 --- a/arch/arm/dts/ax3005.dtsi +++ b/arch/arm/dts/ax3005.dtsi @@ -64,6 +64,12 @@ clock-frequency = <125000000>; bootph-pre-reloc; }; + + clk_xin: clk_xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; }; soc: soc { @@ -96,5 +102,24 @@ bootph-pre-reloc; status = "disabled"; }; + + emmc_phy: emmc-phy@33301c00 { + compatible = "axiado,ax3005-emmc-phy"; + reg = <0x00 0x33301c00 0x00 0x100>; + #phy-cells = <0>; + }; + + sdhci0: mmc0@46000000 { + compatible = "axiado,ax3005-sdhci"; + reg = <0x0 0x46000000 0x00 0x1000>; + clock-names = "clk_xin"; + clocks = <&clk_xin>; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + bus-width = <8>; + phys = <&emmc_phy>; + phy-names = "phy_arasan"; + status = "disabled"; + }; }; }; -- 2.34.1