[PATCH] clk: mediatek: mt8189: add missing qualifiers

David Lechner <[email protected]>
Newsgroups org.u-boot-project.lists.u-boot
Message-ID <20260731-mtk-clk-mt8189-fix-missing-qualifiers-v1-1-92f3f0e44817@baylibre.com>
Add a missing const and a missing static qualifier to a couple of
lookup tables.

Signed-off-by: David Lechner <[email protected]>
---
 drivers/clk/mediatek/clk-mt8189.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8189.c b/drivers/clk/mediatek/clk-mt8189.c
index 15e040569e7..3724dffcc3a 100644
--- a/drivers/clk/mediatek/clk-mt8189.c
+++ b/drivers/clk/mediatek/clk-mt8189.c
@@ -291,7 +291,7 @@ enum {
 	CLK_PAD_AUD_ADC_EXT,
 };
 
-static ulong ext_clock_rates[] = {
+static const ulong ext_clock_rates[] = {
 	[CLK_PAD_CLK32K] = 32000,
 	[CLK_PAD_CLK26M] = 26 * MHZ,
 	[CLK_PAD_ULPOSC] = 260 * MHZ,
@@ -1124,7 +1124,7 @@ static const struct mtk_parent ecc_parents[] = {
 			      _mux_clr_ofs, _shift, _width, _gate,		\
 			      _upd_ofs, _upd, CLK_MUX_SETCLR_UPD)
 
-const struct mtk_composite top_muxes[] = {
+static const struct mtk_composite top_muxes[] = {
 	/* CLK_CFG_0 */
 	MUX_CLR_SET_UPD(CLK_TOP_AXI_SEL, axi_parents, CLK_CFG_0, CLK_CFG_0_SET,
 			CLK_CFG_0_CLR, 0, 3, CLK_CFG_UPDATE, TOP_MUX_AXI_SHIFT),

---
base-commit: 11dfa5a8d20610ad7ca015a25cdcdf0bb35ff05b
change-id: 20260731-mtk-clk-mt8189-fix-missing-qualifiers-80950f2fbf19

Best regards,
--  
David Lechner <[email protected]>
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