[PATCH 3/9] video: rockchip: dw_mipi_dsi: Get GRF base address from phandle

The GRF syscon is referenced using the rockchip,grf prop in SoC DTs.

Change to use syscon_regmap_lookup_by_phandle() to get a GRF regmap
instead of using the inconvenient syscon_get_first_range() method.

This has no intended behavior change, all affected SoC DTs have the
rockchip,grf reference and the values being written already contain
correct write-enable mask.

Fixes: bd6375c5511c ("video: rockchip: dw_mipi_dsi: Fix GRF access")
Signed-off-by: Jonas Karlman <[email protected]>
---
Please note that this has only been compile tested.

Cc: Chris Morgan <[email protected]>
Cc: Ondrej Jirman <[email protected]>
---
 drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
index fa512173510b..2e5bcb74589a 100644
--- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
+++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
@@ -17,6 +17,7 @@
 #include <mipi_dsi.h>
 #include <panel.h>
 #include <phy-mipi-dphy.h>
+#include <regmap.h>
 #include <reset.h>
 #include <syscon.h>
 #include <video_bridge.h>
@@ -31,7 +32,6 @@
 #include <linux/time.h>
 
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/hardware.h>
 
 /*
  * DSI wrapper registers & bit definitions
@@ -224,7 +224,7 @@ struct dw_rockchip_dsi_priv {
 	struct mipi_dsi_device device;
 	void __iomem *base;
 	struct udevice *panel;
-	void __iomem *grf;
+	struct regmap *grf;
 
 	/* Optional external dphy */
 	struct phy phy;
@@ -782,13 +782,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent)
 static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi)
 {
 	if (dsi->cdata->lanecfg1_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
+		regmap_write(dsi->grf, dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
 
 	if (dsi->cdata->lanecfg2_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
+		regmap_write(dsi->grf, dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
 
 	if (dsi->cdata->enable_grf_reg)
-		rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable);
+		regmap_write(dsi->grf, dsi->cdata->enable_grf_reg, dsi->cdata->enable);
 }
 
 static int dw_mipi_dsi_rockchip_bind(struct udevice *dev)
@@ -821,7 +821,11 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,grf");
+	if (IS_ERR(priv->grf)) {
+		dev_err(dev, "unable to find rockchip,grf regmap\n");
+		return PTR_ERR(priv->grf);
+	}
 
 	i = 0;
 	while (cdata[i].reg) {
-- 
2.54.0