[PATCH 09/30] clk: rockchip: rk3328: Use rockchip_sysreset_bind() helper

Jonas Karlman <[email protected]>
Newsgroups org.u-boot-project.lists.u-boot
Message-ID <[email protected]>
Convert to use the rockchip_sysreset_bind() helper to bind the
rockchip_sysreset driver. Also add and use a CRU base address constant
based on the clock-controller address used in the SoC device tree.

Signed-off-by: Jonas Karlman <[email protected]>
---
 .../arm/include/asm/arch-rockchip/cru_rk3328.h |  2 ++
 drivers/clk/rockchip/clk_rk3328.c              | 18 +++++-------------
 2 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 4ad1d33e056e..5dd344b88264 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -59,6 +59,8 @@ check_member(rk3328_cru, sdmmc_ext_con[1], 0x39c);
 
 #define PWM_CLOCK_HZ    (74 * MHz)
 
+#define RK3328_CRU_BASE			0xff440000
+
 enum apll_frequencies {
 	APLL_816_MHZ,
 	APLL_600_MHZ,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 7701a9734ee0..d82cc6887cf8 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -914,22 +914,14 @@ static int rk3328_clk_of_to_plat(struct udevice *dev)
 static int rk3328_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
-	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
-				 &sys_child);
-	if (ret) {
+	ret = rockchip_sysreset_bind(dev, RK3328_CRU_BASE,
+			offsetof(struct rk3328_cru, glb_rst_st),
+			offsetof(struct rk3328_cru, glb_srst_fst_value),
+			offsetof(struct rk3328_cru, glb_srst_snd_value));
+	if (ret)
 		debug("Warning: No sysreset driver: ret=%d\n", ret);
-	} else {
-		priv = malloc(sizeof(struct sysreset_reg));
-		priv->glb_srst_fst_value = offsetof(struct rk3328_cru,
-						    glb_srst_fst_value);
-		priv->glb_srst_snd_value = offsetof(struct rk3328_cru,
-						    glb_srst_snd_value);
-		dev_set_priv(sys_child, priv);
-	}
 
 #if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
 	ret = offsetof(struct rk3328_cru, softrst_con[0]);
-- 
2.54.0
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.