Re: [PATCH 2/4] clk: rockchip: rk3588: Always init clocks in SPL build

Simon Glass <[email protected]>
Newsgroups org.u-boot-project.lists.u-boot
Message-ID <CAFLszTjPE85w92ONGRZhHiSuwnA3s88hh_bntKzGeY5uv9CbXA@mail.gmail.com>
Hi Jonas,

On 2026-08-04T00:26:39, Jonas Karlman <[email protected]> wrote:
> clk: rockchip: rk3588: Always init clocks in SPL build
>
> The CPU PLLs and SPLL are only initialized in SPL on RK3588.
>
> Ensure clock driver is always probed after bind for SPL builds to
> initialize core PLLs and clocks in SPL phase on RK3588.
>
> Signed-off-by: Jonas Karlman <[email protected]>
>
> drivers/clk/rockchip/clk_rk3588.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)

> diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
> @@ -2138,6 +2142,15 @@ static int rk3588_scru_clk_probe(struct udevice *dev)
>       return 0;
>  }
>
> +static int rk3588_scru_clk_bind(struct udevice *dev)
> +{
> +     /* Ensure clocks are initialized after bind in SPL build */
> +     if (IS_ENABLED(CONFIG_SPL_BUILD))
> +             dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
> +
> +     return 0;
> +}

The entire SCRU section starting at line 2052 is wrapped in #ifdef
CONFIG_XPL_BUILD, so this bind function only exists in an XPL build -
s0 are you specifically wanting this to only happen in the SPL phase?
If so, I think you should use xpl_phase() == PHASE_SPL

> diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
> @@ -2009,6 +2009,10 @@ static int rk3588_clk_bind(struct udevice *dev)
>       struct udevice *sys_child;
>       struct sysreset_reg *priv;
>
> +     /* Ensure clocks are initialized after bind in SPL build */
> +     if (IS_ENABLED(CONFIG_SPL_BUILD))
> +             dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
> +

Same question here.

Regards,
Simon
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