[PATCH v3 3/6] watchdog: sbsa_gwdt: set max_timeout_ms in probe

Report the hardware-limited maximum timeout value to the wdt
uclass by setting max_timeout_ms in the per-device uclass-plat
data during sbsa_gwdt_probe().

The timeout is programmed via the 32-bit WOR offset register and
lasts (WOR * 2) ticks, so the largest representable timeout is
(U32_MAX * 2) ticks. This is converted to milliseconds using the
timer clock from get_tbclk(). The value is set only when the clock
rate is non-zero.

Signed-off-by: Juuso Rinta <[email protected]>
---
 drivers/watchdog/sbsa_gwdt.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index 3a924cb2b9a..4ccde7b1e1a 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -6,6 +6,7 @@
  */
 
 #include <asm/io.h>
+#include <div64.h>
 #include <dm/device.h>
 #include <dm/fdtaddr.h>
 #include <dm/read.h>
@@ -91,8 +92,19 @@ static int sbsa_gwdt_expire_now(struct udevice *dev, ulong flags)
 
 static int sbsa_gwdt_probe(struct udevice *dev)
 {
+	struct wdt_uc_plat *plat = dev_get_uclass_plat(dev);
+	u32 clk = get_tbclk();
+
 	debug("%s: Probing wdt%u (sbsa-gwdt)\n", __func__, dev_seq(dev));
 
+	/*
+	 * WOR is 32-bit and the timeout is (WOR value * 2) ticks,
+	 * so the largest timeout the hardware can represent is
+	 * (U32_MAX * 2) ticks.
+	 */
+	if (clk)
+		plat->max_timeout_ms = lldiv((u64)U32_MAX * 2 * 1000, clk);
+
 	return 0;
 }
 

-- 
2.39.2