Re: [PATCH] iommu: Add RISC-V IOMMU driver
Tim Ouyang <[email protected]>
| Newsgroups | org.u-boot-project.lists.u-boot |
|---|---|
| Message-ID | <3q2w5dsgdii7eeeq5mq5jxempshgw4hagagikmvpigxnnounxd@d5rnytl4gkbu> |
On Mon, Aug 17, 2026 at 09:18:23AM -0500, Anirudh Srinivasan wrote: > > Hi Tim, > > On Sun, Aug 16, 2026 at 7:20 AM Tim Ouyang <[email protected]> wrote: > > > > On Mon, Aug 03, 2026 at 03:06:12PM -0500, Anirudh Srinivasan wrote: > > > Adds a basic driver for IOMMUs that conform to the RISC-V IOMMU > > > specification. This driver sets up the IOMMU in bare mode so that > > > peripherals requiring DMA in U-Boot can function. > > > > Would you consider adding support for SPL? > > I don't have an easy way to test this. This will have to be done later. OK, let’s just move forward with the U-Boot proper part for now. > > > +#define RISCV_IOMMU_DDTP_TIMEOUT 10000000 > > > > Although the timeout aligns with Linux’s, it may still be too lengthy > > for the bootloader stage. > > What value do you suggest? Seems like none of the other iommu drivers > use timeouts, so I'm not sure what to pick. I think a one-second timeout should be sufficient on real SoCs, while three seconds should accommodate slower FPGA implementations. -- Best regards, Tim Ouyang