[PATCH 0/2] riscv: spacemit: add pinctrl support for K3 SoC

The pinctrl controller of SpacemiT K3 SoC changed its register BIT
layout definition comparing to old K1 SoC, has different IO
power-domain tables, and extend drive strength bits to 4.

First patch fix drive strength configuration for external-voltage
IO pins.

Please note, this series is composed on top of K1 pinctrl patch-2,3,4
which sent to mailing list here [1]

Link: https://patch.msgid.link/[email protected] [1]
Signed-off-by: Yixun Lan <[email protected]>
---
Yixun Lan (2):
      pinctrl: spacemit: configure drive strength based on power source
      pinctrl: spacemit: k3: add K3 pin support

 drivers/pinctrl/spacemit/Kconfig      |   4 +-
 drivers/pinctrl/spacemit/pinctrl-k1.c | 457 +++++++++++++++++++++++++++++-----
 2 files changed, 390 insertions(+), 71 deletions(-)
---
base-commit: 289cb83053b5939debd96508fb8a839025fab9ee
change-id: 20260820-01-k3-pinctrl-support-77eefc901e47

Best regards,
--  
Yixun Lan <[email protected]>