Re: [PATCH v2 2/2] spi: rockchip: skip the unused FIFO direction on a one-wire device

Hi Quentin,

On 8/20/26 5:57 PM, Quentin Schulz wrote:
> I got confused by the wording here. Can I suggest:
>
> /* When RX wire is not routed, the RX FIFO can never fill, so waiting on
> it would hang. */
>
> I don't understand the context for the second sentence though, we are
> always waiting until not busy, if there's something to transmit, it
> doesn't have anything to do with the RX path does it? What am I missing
> here?

The RX drain was doing double duty in TMOD_TR. Byte N only shows up in
the RX FIFO after byte N has gone out on the wire. Draining toread
bytes is therefore also what made the loop wait for the transfer
itself. With toread forced to zero the loop exits as soon as the last
byte lands in the TX FIFO, which says nothing about the wire. From
there the wait_till_not_busy() below is the only wait left. That is
what the sentence tried to point at.

You're right that it explained none of that. v3 takes your first
sentence and adds the pacing part:

	When the RX wire is not routed, the RX FIFO never fills,
	so waiting on it would hang. Draining it was also what
	paced this loop against the wire, so the transmit-only
	path relies on the wait_till_not_busy() below for
	completion instead.

The test trim from your other mail is in v3 too. Thanks for both
reviews.

Cheers,
Cole