[PATCH 0/2] pinctrl: fix on Spacemit K1 SoC

- Add IO power domain control register programming via APBC block with
  ASAR unlocking for dual-voltage GPIO banks (3.3V/1.8V switching)
- Fix drive strength configuration: use FIELD_PREP(), preserve io_type,
  return correct pin number, and remove redundant initialization

Signed-off-by: Eric Chung <[email protected]>

---
Eric Chung (2):
      pinctrl: k1: fix drive strength configuration
      pinctrl: k1: add IO power domain configuration support

 drivers/pinctrl/spacemit/pinctrl-k1.c | 107 +++++++++++++++++++++++++++++++---
 1 file changed, 100 insertions(+), 7 deletions(-)
---
base-commit: 6073c36b2c8d39afe3ecc789b281667a3ddebc70
change-id: 20260824-pinctrl-718fe50eb9f8

Best regards,
--  
Eric Chung <[email protected]>