Re: [PATCH v1 05/12] mtd: spi-nand: add EN75 BMT bad-block management support

On 26.08.26 00:59, Tom Rini wrote:
> On Wed, Aug 26, 2026 at 04:12:00AM +0530, AK Sharma wrote:
> 
>> Add read support for the EcoNet/Airoha BMT/BBT (bad-block management
>> table) layout used by the EN75xx vendor bootloaders, so U-Boot maps the
>> SPI-NAND logical blocks the same way as the vendor firmware.
>>
>> Signed-off-by: AK Sharma <[email protected]>
>> ---
>>  drivers/mtd/nand/spi/Kconfig    |   8 +
>>  drivers/mtd/nand/spi/Makefile   |   1 +
>>  drivers/mtd/nand/spi/core.c     |   9 +-
>>  drivers/mtd/nand/spi/en75_bmt.c | 665 ++++++++++++++++++++++++++++++++
>>  drivers/mtd/nand/spi/en75_bmt.h |  24 ++
>>  5 files changed, 706 insertions(+), 1 deletion(-)
>>  create mode 100644 drivers/mtd/nand/spi/en75_bmt.c
>>  create mode 100644 drivers/mtd/nand/spi/en75_bmt.h
>>
>> diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
>> index 1124dada..09531914 100644
>> --- a/drivers/mtd/nand/spi/Kconfig
>> +++ b/drivers/mtd/nand/spi/Kconfig
>> @@ -6,3 +6,11 @@ menuconfig MTD_SPI_NAND
>>  	select SPI_MEM
>>  	help
>>  	  This is the framework for the SPI NAND device drivers.
>> +
>> +config MTD_EN75_BMT
>> +	bool "EcoNet EN75xx vendor BMT/BBT translation (read-only)"
>> +	depends on MTD_SPI_NAND
>> +	help
>> +	  Honour the EcoNet/Airoha factory BBT and BMT so logical NAND
>> +	  addresses match the bootbase and Linux. Read-only: never rewrite
>> +	  the tables.
>> diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
>> index a7a0b2cb..20aa718d 100644
>> --- a/drivers/mtd/nand/spi/Makefile
>> +++ b/drivers/mtd/nand/spi/Makefile
>> @@ -1,6 +1,7 @@
>>  # SPDX-License-Identifier: GPL-2.0
>>  
>>  spinand-objs := core.o otp.o
>> +spinand-objs += $(if $(CONFIG_MTD_EN75_BMT),en75_bmt.o)
>>  spinand-objs += alliancememory.o ato.o esmt.o fmsh.o foresee.o gigadevice.o macronix.o
>>  spinand-objs += micron.o paragon.o skyhigh.o toshiba.o winbond.o xtx.o
>>  obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
>> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
>> index 14af4264..29fdefe2 100644
>> --- a/drivers/mtd/nand/spi/core.c
>> +++ b/drivers/mtd/nand/spi/core.c
>> @@ -33,6 +33,7 @@
>>  #include <linux/mtd/spinand.h>
>>  #include <linux/printk.h>
>>  #include <linux/delay.h>
>> +#include "en75_bmt.h"
>>  #endif
>>  
>>  struct spinand_plat {
>> @@ -1703,15 +1704,21 @@ static int spinand_probe(struct udevice *dev)
>>  #ifndef __UBOOT__
>>  	ret = mtd_device_register(mtd, NULL, 0);
>>  #else
>> +	ret = en75_bmt_attach(mtd);
>> +	if (ret)
>> +		goto err_spinand_cleanup;
>> +
>>  	ret = add_mtd_device(mtd);
>>  #endif
>>  	if (ret)
>> -		goto err_spinand_cleanup;
>> +		goto err_bmt_detach;
>>  
>>  	plat->mtd = mtd;
>>  
>>  	return 0;
>>  
>> +err_bmt_detach:
>> +	en75_bmt_detach(mtd);
>>  err_spinand_cleanup:
>>  	spinand_cleanup(spinand);
> 
> I am concerned about generic code path changes here, how is this handled
> in the upstream kernel?

I agree. I don't see any justification or explanation for adding
chip-specific code to the spinand core.

Also, would it be possible for you to upstream the support to the Linux
kernel first and then sync back to U-Boot?