Re: [yocto] System device tree, AMD EDF, custom board

Sergei Nikulov <[email protected]>
Newsgroups org.yoctoproject.lists.yocto
Message-ID <CAE7Ac0Bx2CTE0Q60yGy+birEsmk4pZcZ_Et7Qi0N3CBbAPgw_g@mail.gmail.com>
Hello, Pierre

Yes, I've provided you with the way to modify dts for Linux.
You should clarify exactly your issue.
Perhaps it is not related to yocto at all.

If we are talking about how to put PL bitstream - I've followed EDF
instructions

Vivado (here you define your HW mappings for SDT)  -> XSA file  -> sdtgen
-> SDT -> gen-machine-conf (yoctoproject starts here, AFAIU)

After that

bitbake xilinx-bootbin

put together bitstream + fsbl + pmufw + u-boot to boot.bin (you can verify
what's inside with bootgen tool)

All the best,


On Wed, Jan 28, 2026 at 10:18 PM pierre.daye via Lists.Yoctoproject.Org
<[email protected]> wrote:

> Thanks Sergei,
>
> The issue is that with the system device tree approach, there is a clear
> cut between the linux (from what I understand, interacts only with the
> cortex a53) and the logic part (related to the fpga).
> Your approach is ok as long as you don't have interactions between the
> two, which is exactly my target!
> For example, I want to set the i2c devices that are connected to a i2c
> port linked to the logic part (aka FPGA) on my SoC.
> This is where it is complicated for me to understand what I should do.
> In the process described by AMD (
> https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/3250586081/Development+Flows+-+How+it+all+works),
> it remains unclear to me how I can define these points?
> Should I use an append to xilinx-bootbin or should I try to append it
> during the build of the image (as it was done previously).
>


-- 
Best Regards,
Sergei Nikulov
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