[PATCH 13/15] clk: rockchip: rk3506: Fix trivial clock configuration errors

The RK3506 clock driver has a few trivial copy-paste mistakes in its
clock handling.

Fix the trivial clock configuration error:
- stop CLK_I2Cx from falling through into CLK_I2C2

Signed-off-by: Jonas Karlman <[email protected]>
---
 drivers/clk/rockchip/clk_rk3506.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3506.c b/drivers/clk/rockchip/clk_rk3506.c
index 38066c5c3e3c..457082eea87b 100644
--- a/drivers/clk/rockchip/clk_rk3506.c
+++ b/drivers/clk/rockchip/clk_rk3506.c
@@ -537,10 +537,12 @@ static ulong rk3506_i2c_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)
 		con = readl(RK3506_CLKSEL_CON(32));
 		sel = FIELD_GET(CLK_I2C0_SEL_MASK, con);
 		div = FIELD_GET(CLK_I2C0_DIV_MASK, con);
+		break;
 	case CLK_I2C1:
 		con = readl(RK3506_CLKSEL_CON(32));
 		sel = FIELD_GET(CLK_I2C1_SEL_MASK, con);
 		div = FIELD_GET(CLK_I2C1_DIV_MASK, con);
+		break;
 	case CLK_I2C2:
 		con = readl(RK3506_CLKSEL_CON(33));
 		sel = FIELD_GET(CLK_I2C2_SEL_MASK, con);
-- 
2.54.0