Question about layers in Electric
Matt McCullough <[email protected]> Mon, 27 Jun 2011 13:54:03 -0600
| Newsgroups | gmane.comp.cad.electric.general |
|---|---|
| Message-ID | <[email protected]> |
--===============5984893133216174081== Content-Type: multipart/alternative; boundary=0016364c73c1c489d204a6b6e9a8 --0016364c73c1c489d204a6b6e9a8 Content-Type: text/plain; charset=ISO-8859-1 Hi, I am currently working on several layouts that involve enclosed-layout transistors and guard rings. I was trying to put a p-doped ring around the n-channel transistors, however, the tool places an n-well around the p-active layer when I place it. I was wondering if there was a way to use the p-active layer without the n-well being automatically placed around it. I was also unsure of the difference between "p-active nodes" and "p-active-well-nodes" in the mocmos technology. If anyone could help, I would really appreciate it. Thanks, Matt --0016364c73c1c489d204a6b6e9a8 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi,<br><br>I am currently working on several layouts that involve enclosed-= layout transistors and guard rings. I was trying to put a p-doped ring arou= nd the n-channel transistors, however, the tool places an n-well around the= p-active layer when I place it. I was wondering if there was a way to use = the p-active layer without the n-well being automatically placed around it.= I was also unsure of the difference between "p-active nodes" and= "p-active-well-nodes" in the mocmos technology. If anyone could = help, I would really appreciate it. <br> <br>Thanks,<br>Matt<br> --0016364c73c1c489d204a6b6e9a8-- --===============5984893133216174081== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Discuss-gnu-electric mailing list [email protected] https://lists.gnu.org/mailman/listinfo/discuss-gnu-electric --===============5984893133216174081==--