Re: [PATCH 4/4] hw/arm/mps2-tz.c: add new mps3-an555 board

> Why did you need to update this? The AN555 appnote documents that
> interrupts go from 0 to 127; 0..31 are the ones in the SSE, and 32..127
> are the "external" ones. NUMIRQ for this code is the number of external
> interrupts, so 127 - 31 == 96. Like the AN547, the highest interrupt
> is 127, from UART5. So I think that 96 should be the right value for
> AN555 also.

I got the number 100 from the an555 TRM, page 17:
https://support.arm.com/documentation/107642/latest
The last configuration "CPU0EXPNUMIRQ" specified 100 so I thought
was what "MPS2TZ_NUMIRQ_MAX" referred to. But I do see in table 7-2
that the IRQs stop at 127 like you mentioned. I'll revert it back to 96.

Best regards,
Simon Xu