Re: [RFC PATCH v3 02/19] scripts: bug fixes in update-aarch64-cpu-sysreg-properties
Khushit Shah <[email protected]>
| Newsgroups | gmane.comp.emulators.qemu |
|---|---|
| Message-ID | <[email protected]> |
> On 20 Jul 2026, at 7:54 PM, Eric Auger <[email protected]> wrote: > > !-------------------------------------------------------------------| > CAUTION: External Email > > |-------------------------------------------------------------------! > > > > On 7/16/26 11:38 PM, Khushit Shah wrote: >> - handle quoted bitstrings and decimal >> - skip Values.ValueRange entries. > The above is the issue you reported on my v6. See my comment on the > other thread. Acked. >> - Emit unique RESx_{lsb} names for reserved fields so no two fields in >> a register share a name. > The requirement for naming RES field needs to be explained. I understand > that now you expose all fields including those which are not writable it > may be required but at this stage I still fail why this is requested. I think we don’t need to expose RES fields to users. I was thinking of case where a RES0 field is repurposed for something else, but that should be taken care by zeroing the ID regs array before initiating the named model hierarchy. (RES1 field in CTR_EL0 needs some handling). On why we even need to expose non-writable fields: - Assume some non-writable field mismatches for the model and host, why do we want to stop users from explicitly overriding the model's field value to host value? >> - Emit a dummy 64-bit VAL field for registers with no defined fields, >> such as AIDR_EL1 and REVIDR_EL1. > This is yet another functional change that could be separate. Acked, will do in v4. > Thanks > > Eric >> >> Signed-off-by: Khushit Shah <[email protected]> >> --- >> .../update-aarch64-cpu-sysreg-properties.py | 67 +++++++++++++------ >> 1 file changed, 45 insertions(+), 22 deletions(-) >> mode change 100644 => 100755 scripts/update-aarch64-cpu-sysreg-properties.py >> >> diff --git a/scripts/update-aarch64-cpu-sysreg-properties.py b/scripts/update-aarch64-cpu-sysreg-properties.py >> old mode 100644 >> new mode 100755 >> index 9e829fda2e..ecc35db528 >> --- a/scripts/update-aarch64-cpu-sysreg-properties.py >> +++ b/scripts/update-aarch64-cpu-sysreg-properties.py >> @@ -106,6 +106,29 @@ def collect_fields(item, bit_offset=0): >> >> return fields >> >> +def parse_value_int(raw_val): >> + if raw_val is None or isinstance(raw_val, bool): >> + return None >> + >> + # may already be real number >> + if isinstance(raw_val, int): >> + return raw_val >> + >> + raw_str = str(raw_val).strip() >> + >> + if "'" in raw_str: >> + # quoted bitstring like "'0100'" >> + bits = raw_str.replace("'", "") >> + try: >> + return int(bits, 2) >> + except ValueError: >> + return None >> + >> + # unquoted, try decimal >> + try: >> + return int(raw_str, 0) >> + except ValueError: >> + return None >> >> def extract_field_enums(field): >> enums = [] >> @@ -124,32 +147,23 @@ def extract_field_enums(field): >> if not isinstance(val_entries, list): >> return enums >> >> + # A Values.ValueRange field specifies start and end value for a range. >> + # Don't enumerate anything for them. >> + for val_entry in val_entries: >> + if isinstance(val_entry, dict) and \ >> + val_entry.get("_type") == "Values.ValueRange": >> + return [] >> + >> for val_entry in val_entries: >> if not isinstance(val_entry, dict): >> continue >> - >> + >> if val_entry.get("_type") == "Values.Value": >> - raw_val = val_entry.get("value") >> - if raw_val is None: >> + int_val = parse_value_int(val_entry.get("value")) >> + if int_val is None: >> continue >> - >> - # some of the values have ' like "'0100'" >> - raw_val_str = str(raw_val).strip().replace("'", "") >> - >> - try: >> - # convert into bin >> - int_val = int(raw_val_str, 2) >> - except ValueError: >> - try: >> - # Fallback to dec if not bin >> - int_val = int(raw_val_str, 0) >> - except ValueError: >> - continue >> - >> - enums.append({ >> - 'value': int_val >> - }) >> - >> + enums.append({'value': int_val}) >> + >> return enums >> >> def generate_sysreg_properties_from_registers_json(id_reg_names, raw_json_path): >> @@ -210,7 +224,7 @@ def generate_sysreg_properties_from_registers_json(id_reg_names, raw_json_path): >> msb > current_fieldset_fields[unique_key]['msb']: >> enums = extract_field_enums(val) >> current_fieldset_fields[unique_key] = { >> - 'raw_name': name, >> + 'raw_name': unique_key, >> 'lsb': lsb, >> 'msb': msb, >> 'width': width, >> @@ -238,6 +252,15 @@ def generate_sysreg_properties_from_registers_json(id_reg_names, raw_json_path): >> # Sort decreasing lsbs >> sorted_fields = sorted(unique_fields.items(), >> key=lambda x: x[1]['lsb'], reverse=True) >> + if len(sorted_fields) == 0: >> + # cases like REVIDR_EL1 and AIDR_EL1. >> + # augment a dummy fields VAL. >> + sorted_fields.append(('VAL', { >> + 'lsb': 0, >> + 'msb': 63, >> + 'width': 64, >> + 'enums': [] >> + })) >> >> for unique_key, bits in sorted_fields: >> enums_list = bits.get('enums', []) >