[PATCH v2 06/39] xen/riscv: use UINT64_MAX to disable the VS-timer
Oleksii Kurochko <[email protected]>
| Newsgroups | gmane.comp.emulators.xen.devel |
|---|---|
| Message-ID | <93829c39b080d288ea342c7375d5307f93ee9a29.1787838835.git.oleksii.kurochko@gmail.com> |
vstimecmp is a 64-bit CSR independently of XLEN, which is why it is
written with csr_write64(). On RV32 that macro splits the value into
the vstimecmp/vstimecmph pair, so passing ULONG_MAX (0xffffffff there)
writes all ones to the low half and zero to the high half, leaving the
CSR at 0x00000000ffffffff rather than at its maximum. A VS-timer irq
would then become pending as soon as (time + htimedelta) reaches 2^32,
which is exactly what the code is trying to avoid.
Use UINT64_MAX, which matches the width of the CSR. On RV64 it is equal
to ULONG_MAX, so no functional change there.
Fixes: 25e032730690 ("xen/riscv: allow Xen to use SSTC while hiding it from guests")
Signed-off-by: Oleksii Kurochko <[email protected]>
---
Changes in v2:
- New patch.
---
---
xen/arch/riscv/time.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c
index 602c029641b8..8c25198b4063 100644
--- a/xen/arch/riscv/time.c
+++ b/xen/arch/riscv/time.c
@@ -101,8 +101,8 @@ void __init preinit_xen_time(void)
* A VS-timer interrupt becomes pending whenever the value of
* (time + htimedelta) is greater than or equal to vstimecmp CSR.
* Thereby to avoid spurious VS-timer irqs set vstimecmp CSR to
- * ULONG_MAX.
+ * UINT64_MAX.
*/
- csr_write64(CSR_VSTIMECMP, ULONG_MAX);
+ csr_write64(CSR_VSTIMECMP, UINT64_MAX);
}
}
--
2.55.0