[PATCH v2 02/39] xen/riscv: drop bug.h's duplicate instruction length helpers
Oleksii Kurochko <[email protected]>
| Newsgroups | gmane.comp.emulators.xen.devel |
|---|---|
| Message-ID | <9908a5b8a5e0d00403af8073a6b7452c19795fc3.1787838835.git.oleksii.kurochko@gmail.com> |
asm/riscv_encoding.h already provides INSN_16BIT_MASK and INSN_LEN(), and emulate.c uses them, so the tree carried two spellings of the same thing which could drift apart. COMPRESSED_INSN_MASK never had a user. No functional change. Signed-off-by: Oleksii Kurochko <[email protected]> --- Changes in v2: - new patch. --- --- xen/arch/riscv/include/asm/bug.h | 19 ------------------- xen/arch/riscv/traps.c | 2 +- 2 files changed, 1 insertion(+), 20 deletions(-) diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h index e6f286881662..c2cdc2dc2a46 100644 --- a/xen/arch/riscv/include/asm/bug.h +++ b/xen/arch/riscv/include/asm/bug.h @@ -13,25 +13,6 @@ #define BUG_INSTR "unimp" -/* - * The base instruction set has a fixed length of 32-bit naturally aligned - * instructions. - * - * There are extensions of variable length ( where each instruction can be - * any number of 16-bit parcels in length ). - * - * Compressed ISA is used now where the instruction length is 16 bit and - * 'unimp' instruction, in this case, can be either 16 or 32 bit ( - * depending on if compressed ISA is used or not ) - */ -#define INSN_LENGTH_MASK _UL(0x3) -#define INSN_LENGTH_32 _UL(0x3) - -#define COMPRESSED_INSN_MASK _UL(0xffff) - -#define GET_INSN_LENGTH(insn) \ - (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ - #endif /* !__ASSEMBLER__ */ #endif /* ASM__RISCV__BUG_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index d35c013e1399..8530e6fbda0a 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -214,7 +214,7 @@ void do_trap(struct cpu_user_regs *cpu_regs) die(); } - cpu_regs->sepc += GET_INSN_LENGTH(*(uint16_t *)pc); + cpu_regs->sepc += INSN_LEN(*(uint16_t *)pc); break; } -- 2.55.0