RE: Question about YMM register availability in x86 CPUs

> -----Original Message-----
> From: Gdb <[email protected]> On Behalf
> Of Guinevere Larsen via Gdb
> Sent: Mittwoch, 12. Juni 2024 22:31
> To: [email protected]
> Subject: Question about YMM register availability in x86 CPUs
> 
> Hello gdb list!
> 
> TL;DR: Is it reasonable to assume that all x86 CPUs that have AVX
> capabilities will have both XMM and YMM registers?
> 

Hi Guinivere,

The Intel Software Development Manual tells you about AVX
in Volume 1, Chapter 14.1.1:

"Intel AVX introduces support for 256-bit wide SIMD registers (YMM0-YMM7
in operating modes that are 32-bit or less, YMM0-YMM15 in 64-bit mode).
The lower 128-bits of the YMM registers are aliased to the respective 128-bit
XMM registers"

In chapter 14.6.1 it tells you what AVX2 added. It is just extending old
instructions to 256 bit and adding new ones. No new register space.

So I think yes it is reasonable to assume that.

Regards,
Felix


Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928