SPI and polling transfer
Uwe Bonnes <bon-1JbLm1bU5j5ZIx36JBfelj3+ndqKAYMe9FMPySWZwLkb1SvskN2V4Q@public.gmane.org>
| Newsgroups | gmane.comp.hardware.microcontrollers.ethernut |
|---|---|
| Message-ID | <[email protected]> |
Hello, bringing up SPI on some new device, probably always polling transfer is implemented first. So did the STM32 SPI driver. However, is there any reason to keep polling transfer in a mature driver? At present the STM32 provides a choice polling transfer, IRQ transfer with an event every byte transferred and block DMA transfer with only one event at the end of the tranferred block. For STM32 an SPI interrupt entry is always available. So there is no incentive to "keep polling transfer as otherwise precious resources are occupied". Any other reasons? B.t.w: "SPIBUSx_POLLING_MODE" is found in the configurator for nearly all archs... -- Uwe Bonnes bon-1JbLm1bU5j5ZIx36JBfelj3+ndqKAYMe9FMPySWZwLkb1SvskN2V4Q@public.gmane.org Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ---------- _______________________________________________ http://lists.egnite.de/mailman/listinfo/en-nut-discussion