STM32: Attention: Configuration change!

Hello,

todays batch of patches mostly reworks STM32 clock setup.

If you use a custom config, please change:

1. HSE_BYPASS = "" to HSE_BYPASS = "ENABLE" 
2. LSE_BYPASS = "" to LSE_BYPASS = "ENABLE"
3. SYSCLK_SOURCE, PLLCLK_SOURCE and SYSCLK_FREQ are only optional:
For some standard clock, at least HSE_VALUE = "8000000", the configuration
now sets up clock speed to the highest value possible with voltage range
etc. SYSCLK_SOURCE, PLLCLK_SOURCE and SYSCLK_FREQ are not needed in that case.

To see the parameters used for your setup, define CLOCK_DEBUG and compile
the library. Used parameters will be printed

If the parameters don't fit, tune the parameters in the configurator under
Architecture -> CM3 -> STM32 Family -> STM32 Clock and system settings.

N.B.
With no HSE value given, STM32L47x will use 48 MHz MSI RC, with PLL
stabilisation if LSE_VALUE= "32768" is set.

Bye
-- 
Uwe Bonnes                bon-1JbLm1bU5j5ZIx36JBfelj3+ndqKAYMe9FMPySWZwLkb1SvskN2V4Q@public.gmane.org

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
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