Re: [EE] PCB design

Jason White <[email protected]> Wed, 23 Jul 2025 18:13:31 -0400
Newsgroups gmane.comp.hardware.microcontrollers.pic
Message-ID <CAOFvGD7kHZx2o68XOPzoctiwLQ64XGoaatJm0ShcXTE0BXuy5g@mail.gmail.com>
Whatever results in the fewest number of vias is generally a good measure.

Although with 4 layer boards only costing a few dollars extra from
suppliers like JLC, it might be a moot point.