[EE]: PCB layout of crystal oscillator for MCU

Hi,

This is my very first attempt to layout a crystal oscillator for MCU of
TQFP package. Attached screenshot shows the top layer of 4 layers stack up.
The MCU is PIC18F57Q84-I/PT and the crystal is ABM11W-16.0000MHZ-8-B1U-T3.
Link: ABM11W-16.0000MHZ-8-B1U-T3 Abracon LLC | Crystals | DigiKey
<https://www.digikey.my/en/products/detail/abracon-llc/abm11w-16-0000mhz-8-b1u-t3/7172584>

Prior to coming up with the work as shown in attached screenshot, I have
read some application notes and suggestion on the webs but I still have
some doubts.

1) The stitching ground vias: should I bring them closer to the crystal?

2) The rectangle inside the stitching vias is construction lines I used to
define a no-fill-zone for VDD layer. Should I make it larger to cover the
stitching vias, or smaller to just cover the crystal, or leave it as shown
in the screenshot?

Appreciate any advice and comments.
Thanks very much.

--
WH Tan