CPLD and socket board pins mapping

"Simon Wong" <swong-5bdsyQ5pCqFWk0Htik3J/[email protected]>
Newsgroups gmane.comp.hardware.microcontrollers.tini
Message-ID <000001c3d646$45b4afb0$3b01000a@baal>
Hi,

I've mounted a CPLD and a regulator onto the 400 socket board. I'm able to
load the sample CPLD bitmap from Maxim onto the CPLD.

My question is, what are the pin mappings? There's UIO(x) and XIO(y), but I
don't know what they do. Are some of them data outputs from the DataPort
class? Are some of them address lines from PCE or CE? I can't seem to find
documentation on these IO ports.

Thanks,
Simon Wong

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