Coldfire 5235 I/D split cache

I also posted most of this on uClinux-dev. I am using a 2.4.31-uc0
kernel.

I've been experimenting with enabling the split instruction and data
cache on the 5235. I get a good speedup - my boot time is reduced by 30%
to 27 seconds. However, I am occasionally getting problems with certain
programs starting up (perhaps a pthreads issue). Things have worked
perfectly when in i-cache only.

So does anyone have the split I/D cache working fine on 5235?

Also, the CPUSHL instruction documentation is vague. The CF Programmer's
Reference says one thing, and the MCF5235 ref says another. They seem to
suggest that the CPUSHL instruction address operand specifies the
address within the cache line instead of address of the memory being
cached. Anyone have more experience with this?


- Jate S.
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