Re: New to MPC555 and wondering about FQD - TPU functions?
Eric McRae <[email protected]>
| Newsgroups | gmane.comp.hardware.motorola.microcontrollers |
|---|---|
| Message-ID | <[email protected]> |
fotori wrote:
> I would appreciate it if someone could aid me in understanding the
> functions of the TPU. The first in a series of question to come: how
> does the input digital filter affect the FQD latency?
The digital filter delays recognition of an input signal by how ever
many clocks you configure it for. Lacking the mythical
anticipator-regretor circuit :-), the filters require the input to
remain in its new state for the specified number of clocks before the
state change is recognized.
In the original TPUs, there was some ambiguity in that a signal always
took at least two but sometimes up to three clocks to be recognized. I
don't know if that -0 +1 clock ambiguity persists in the TPU2 and TPU3
engines.
So the signal recognition delay must be added to scheduler latency and
longest function thread[s depending on how you set priorities] to
calculate the maximum function latency.
--
Eric McRae, Electro-Logic Machines, Inc.
511 Root St., Port Townsend WA, 98368
Phone/Fax: 360.379.0969, http://www.elmi.com
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