Burst on 565

Hello!

I get quite confused about the burst feature on MPC565. There is a 
burst support in the memory controller, and another one in the USIU 
which can be activated by the SIUMCR[BURST_EN] bit. However this bit 
is not documented among other SIUMCR bits. Moreover, it is also said 
that these two bursts shouldn't be enabled at the same time. Would 
someone please clarify briefly when does USIU burst work and when 
memory controller burst, and how and when to enable them?

I am now reading the latest errata, it is quite a breathtaking 
reading. It is quite unlucky that in the beginning of errata several 
items are listed twice, so to compare it with previous errata is time-
consuming.

Regards
Attila







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