Interrupt Masking
joydeep roy <[email protected]>
| Newsgroups | gmane.comp.hardware.motorola.microcontrollers |
|---|---|
| Message-ID | <[email protected]> |
Hi all
This is a small query regarding masking of some
interrupt level. In MPC565/MPC566 Reference
Manual,page no.6-34 there is a note that suggest that
"To mask interrupt sources, first set the coreÂs
status register interrupt mask level to that of the
source being masked in SIMASK. Then, the SIMASK bit
can be masked."
Can anyone tell me exactly which bit has to be
processed in the MSR??
Any help is appreciated.
Thanks,
Joy
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