Regarding QADC of MPC565
harini m <[email protected]>
| Newsgroups | gmane.comp.hardware.motorola.microcontrollers |
|---|---|
| Message-ID | <[email protected]> |
Hi every body,
I have following doubts regarding QADC of MPC565
1. What is the meaning of supervisor only data access? Here in QADC MCR,TEST and Interrupt register are supervisor access only register. So how can i set supervisor access mode in MPC565?
2. For QADC Conversion to be complete it takes 14 or 28 QCLK cycle. Is this time for each conversion are for all 40 Channel conversion complete?
3. In MPC565 extra added Anlog channels (AN80 to AN87 internal Multiplexing). What will be conversion time for this Analog inputs?
4. Is there any access time difference for both modules(A & B) if it is accessing Analog channels of other modules?
5. If I connected externally multiplexing analog channels. What are the different factors effecting the conversion time?
Please clarify these doubts any body as early as possible.
Advance thanks.
Regards
Harini.M
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