RE: Memory mapping on MPC556

"Randall Young" <[email protected]> Wed, 22 Nov 2006 14:58:28 -0800
Newsgroups gmane.comp.hardware.motorola.microcontrollers
Message-ID <[email protected]>
> When I reset the CPU in debug mode, the PC is set to 0xFF?00100.

> As internal EPROM of the CPU starts at 0x00000000, I am wondering why
> this happens.

As I recall, both the address the PC is set to (aka the vector table base
location), and the address the internal EPROM starts at, can be configured
by the Reset Control Word (RCW).  Thus the chip can start either from
internal EPROM or external (EP)ROM.  

If you are seeing the reset vector fetched from 0xFF?00100, then somehow the
IP bit in the RCW is being set.

> Why are the LOWER 16 address bits compared?

Because Motorola numbers bits backwards.  Bit 0 is actually the most
significant bit in 99% of their documentation.  (Note however that there is
at least one section in the MPC565/566 manual where bit 0 is the LSB.)

Randall Young
Senior Software Engineer
NavCom Technology, Inc.
A John Deere Company 


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