RE: Management of several interrupts in the same time

This is a common problem effecting all status registers that are cleared
by writing 1, not just interrupt sources.  The proper procedure is to
write a 1 ONLY to the bit you want to clear.  This means you cannot read
the register, OR the bit you want to clear and then write back, since
this would clear all the status bits.  In your case, if you want to
clear IRQ1 only, you write 0x20000000 (I'm referring to MPC555 SIPEND
layout).  You must be writing 0x28000000 when IRQ2 is set which clears
both bits.
 
correct
------------
#define CLEAR_IRQ1 0x20000000
SIPEND = CLEAR_IRQ1;    
 
incorrect
--------------
SIPEND = SIPEND | 0x20000000;
 
also incorrect since it uses logical OR (uses mpc5xx header files)
-------------
SIPEND.B.IRQ1 = 1;
 
- Allan

________________________________

From: [email protected] [mailto:[email protected]] On Behalf
Of David C.
Sent: Saturday, April 07, 2007 5:27 AM
To: [email protected]
Subject: [MPC500] Management of several interrupts in the same time




My question is related to the management of several interrupts in the
same
time. I use a MPC860 (It may be the same problem for MPC500)

Thanks to the SIPEND register, I know that two external interrupts
occurred
in the same time (IRQ1 and IRQ2, on falling edge). The one which has the
main priority is managed in a first time, because SIVEC indicates the
corresponding vector.

Problem :
When I clean the first interrupt in writing the corresponding bit to "1"
in
the SIPEND register, the second bit which was indicating the second
external
interrupt is cleaned too. So the second interrupt is never managed.

Have you ever seen this problem and do you know a way to correct it ?

Thank you ;)

(Excuse me for my poor english)
-- 
View this message in context:
http://www.nabble.com/Management-of-several-interrupts-in-the-same-time-
tf3540384.html#a9882937
<http://www.nabble.com/Management-of-several-interrupts-in-the-same-time
-tf3540384.html#a9882937> 
Sent from the MPC500 mailing list archive at Nabble.com.



 


[Non-text portions of this message have been removed]