Re: MSP430F5528 - Clock and UART

"Onestone [email protected] [msp430]" <[email protected]> Wed, 18 Feb 2015 08:37:07 +1030
Newsgroups gmane.comp.hardware.texas-instruments.msp430.discuss
Message-ID <[email protected]>
Why oh why are you bit banging this when the MSP430 has an extremely 
simple UART in hardware. Are interrupts that fightening?

Al

On 18/02/2015 2:21 AM, [email protected] [msp430] wrote:
>
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> Hello, I'm trying to communicate with my RF module through UART 
> interface. However, I get many errors even with low load. I suspect 
> that I have an issue with the way that I configure the clock or the UART.
>
>
> Basically, for the UART functionality I use 
> http://glitovsky.com/blog/?p=300
>
> (I configured the connection as 8N1 at 115200).
>
>
> The clock configuration below is used with MCLK = 25 MHz ( when I use 
> it with MCLK=16 MHz I cannot communicate with the UART module at all ) .
>
>
>  P5SEL |= 0x0C;
>
>   /* Select REF0 for FLL reference. */
>
>  UCSCTL3 &= ~SELREF_7;
>
>  UCSCTL3 |= SELREF_2;
>
>
>  /* Set ACLK to use REF0CLK.
>
>    * Set SMCLK to use the DCO.
>
>   */
>
>   UCSCTL4 &= ~SELA_7 & ~SELS_7 & ~SELM_7;
>
>   UCSCTL4 |= SELA_2 | SELS_4 | SELM_4;
>
>    /* Initialize FLL. */
>    Init_FLL_Settle(mclk/1000L, mclk/32768);
>
>    XT2_Start(XT2DRIVE_0);
>
>    UCSCTL4 &= ~SELA_7;
>     UCSCTL4 |= SELA_2;
>    UCSCTL8 |= SMCLKREQEN | MCLKREQEN | ACLKREQEN;
>    /* Enable interrupt for TBCCR0. */
>     TBCCTL0 = CCIE;
>   /* Number of ticks per millisecond. */
>     clock.aclk = 32768;
>     clock.ticks_per_interrupt = clock.aclk / 1000;
>     TBCCR0 = clock.ticks_per_interrupt;
>
>     /* Use ACLK, set timer to up-count mode, and start timer at zero. */
>     TBCTL = TBSSEL_1 | MC_2 | TBCLR;
>
>    /* Enable interrupts. */
>     __bis_SR_register(GIE);
> Thanks,
> Mike
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