Re: MSP430F5528 - Clock and UART

 I believe you were looking for ³frightening² not ³fightening".

From:  "msp430@yahoogroups. com" <[email protected]>
Reply-To:  "msp430@yahoogroups. com" <[email protected]>
Date:  Tuesday, February 17, 2015 at 3:07 PM
To:  "msp430@yahoogroups. com" <[email protected]>
Subject:  Re: [msp430] MSP430F5528 - Clock and UART

 
 
 
 
   

   Why oh why are you bit banging this when the MSP430 has an extremely
simple UART in hardware. Are interrupts that fightening?
 
 Al
 
 

On 18/02/2015 2:21 AM, [email protected] [msp430] wrote:
 
 
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> Hello, I'm trying to communicate with my RF module through UART interface.
> However, I get many errors even with low load. I suspect that I have an issue
> with the way that I configure the clock or the UART.
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> Basically, for the UART functionality I use http://glitovsky.com/blog/?p=300
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> (I configured the connection as 8N1 at 115200).
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> The clock configuration below is used with MCLK = 25 MHz ( when I use it with
> MCLK=16 MHz I cannot communicate with the UART module at all ) .
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>  P5SEL |= 0x0C;
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>   /* Select REF0 for FLL reference. */
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>  UCSCTL3 &= ~SELREF_7;
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>  UCSCTL3 |= SELREF_2;
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>  /* Set ACLK to use REF0CLK.
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>    * Set SMCLK to use the DCO.
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>   */
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>   UCSCTL4 &= ~SELA_7 & ~SELS_7 & ~SELM_7;
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>   UCSCTL4 |= SELA_2 | SELS_4 | SELM_4;
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>    /* Initialize FLL. */
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>    Init_FLL_Settle(mclk/1000L, mclk/32768);
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>    XT2_Start(XT2DRIVE_0);
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>    UCSCTL4 &= ~SELA_7;
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>     UCSCTL4 |= SELA_2;
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>    UCSCTL8 |= SMCLKREQEN | MCLKREQEN | ACLKREQEN;
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>    /* Enable interrupt for TBCCR0. */
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>     TBCCTL0 = CCIE;
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>   /* Number of ticks per millisecond. */
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>     clock.aclk = 32768;
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>     clock.ticks_per_interrupt = clock.aclk / 1000;
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>     TBCCR0 = clock.ticks_per_interrupt;
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>     /* Use ACLK, set timer to up-count mode, and start timer at zero. */
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>     TBCTL = TBSSEL_1 | MC_2 | TBCLR;
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>    /* Enable interrupts. */
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>     __bis_SR_register(GIE);
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> Thanks, 
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> Mike
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