CVS: msp430-libc/include msp430x261x.h, 1.7, 1.8 msp430x54xx.h, 1.4, 1.5 signal.h, 1.16, 1.17

Update of /cvsroot/mspgcc/msp430-libc/include
In directory 23jxhf1.ch3.sourceforge.com:/tmp/cvs-serv15863/include

Modified Files:
	msp430x261x.h msp430x54xx.h signal.h 
Log Message:
- add the registers for the unified clock system (unified_clock_system.h) and patches the ucsi.h, timera.h, signal.h, msp430x54xx.h and msp430x261x.h

thanks to Gerald


Index: msp430x261x.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430x261x.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -w -d -r1.7 -r1.8
--- msp430x261x.h	3 Apr 2009 05:25:33 -0000	1.7
+++ msp430x261x.h	4 Jun 2009 21:55:18 -0000	1.8
@@ -39,6 +39,7 @@
 #define __MSP430_HAS_PORT8_R__
 #define __MSP430_HAS_SVS__
 #define __MSP430_HAS_USCI__
+#define __MSP430_HAS_USCI0__
 #define __MSP430_HAS_USCI1__
 #define __MSP430_HAS_USCI_AB0__
 #define __MSP430_HAS_USCI_AB1__

Index: msp430x54xx.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/msp430x54xx.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -w -d -r1.4 -r1.5
--- msp430x54xx.h	22 Mar 2009 11:02:17 -0000	1.4
+++ msp430x54xx.h	4 Jun 2009 21:55:18 -0000	1.5
@@ -17,6 +17,13 @@
 
 #include <iomacros.h>
 
+#define __MSP430_HAS_T0A5__
+#define __MSP430_HAS_T1A3__
+#define __MSP430_HAS_UCS__
+#define __MSP430_HAS_USCI0_5__
+#define __MSP430_HAS_USCI1_5__
+#define __MSP430_HAS_USCI2_5__
+#define __MSP430_HAS_USCI2_5__
 #define __MSP430_SYS_BASE__     0x180
 #define __MSP430_WDT_A_BASE__   0x150
 #define __MSP430_PORT1_BASE__   0x200
@@ -39,12 +46,17 @@
 #include <msp430/sys.h>
 #include <msp430/gpio_5xxx.h>
 #include <msp430/mpy32.h>
+#include <msp430/timera.h>
+#include <msp430/unified_clock_system.h>
+#include <msp430/usci.h>
 
 /*
 
   Empty yet :(
 
 */
+#define GIE                 0x0008
+
 #define SFRIE1_             0x0100  /* Interrupt Enable 1 */
 #define SFRIE1_L_           SFRIE1_
 #define SFRIE1_H_           SFRIE1_ + 0x01

Index: signal.h
===================================================================
RCS file: /cvsroot/mspgcc/msp430-libc/include/signal.h,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -w -d -r1.16 -r1.17
--- signal.h	9 Oct 2008 15:00:14 -0000	1.16
+++ signal.h	4 Jun 2009 21:55:18 -0000	1.17
@@ -35,6 +35,10 @@
 #if defined(__MSP430X__)
 #define INTERRUPT_VECTOR_SLOTS      32
 #define RESET_VECTOR                62
+#elif defined(__MSP430X2__)
+#warning X2 ist da
+#define INTERRUPT_VECTOR_SLOTS      64
+#define RESET_VECTOR                126
 #else
 #define INTERRUPT_VECTOR_SLOTS      16
 #define RESET_VECTOR	            30
@@ -82,7 +86,72 @@
 
 /* Direct generation of the labels is impossible, so just replace the dummy ones
    with the real ones through those defs:*/
-#if INTERRUPT_VECTOR_SLOTS == 32
+#if INTERRUPT_VECTOR_SLOTS == 64
+#define vector_0   vector_ff80
+#define vector_2   vector_ff82
+#define vector_4   vector_ff84
+#define vector_6   vector_ff86
+#define vector_8   vector_ff88
+#define vector_10  vector_ff8a
+#define vector_12  vector_ff8c
+#define vector_14  vector_ff8e
+#define vector_16  vector_ff90
+#define vector_18  vector_ff92
+#define vector_20  vector_ff94
+#define vector_22  vector_ff96
+#define vector_24  vector_ff98
+#define vector_26  vector_ff9a
+#define vector_28  vector_ff9c
+#define vector_30  vector_ff9e
+#define vector_32  vector_ffa0
+#define vector_34  vector_ffa2
+#define vector_36  vector_ffa4
+#define vector_38  vector_ffa6
+#define vector_40  vector_ffa8
+#define vector_42  vector_ffaa
+#define vector_44  vector_ffac
+#define vector_46  vector_ffae
+#define vector_48  vector_ffb0
+#define vector_50  vector_ffb2
+#define vector_52  vector_ffb4
+#define vector_54  vector_ffb6
+#define vector_56  vector_ffb8
+#define vector_58  vector_ffba
+#define vector_60  vector_ffbc
+#define vector_62  vector_ffbe
+#define vector_64  vector_ffc0
+#define vector_66  vector_ffc2
+#define vector_68  vector_ffc4
+#define vector_70  vector_ffc6
+#define vector_72  vector_ffc8
+#define vector_74  vector_ffca
+#define vector_76  vector_ffcc
+#define vector_78  vector_ffce
+#define vector_80  vector_ffd0
+#define vector_82  vector_ffd2
+#define vector_84  vector_ffd4
+#define vector_86  vector_ffd6
+#define vector_88  vector_ffd8
+#define vector_90  vector_ffda
+#define vector_92  vector_ffdc
+#define vector_94  vector_ffde
+#define vector_96  vector_ffe0
+#define vector_98  vector_ffe2
+#define vector_100 vector_ffe4
+#define vector_102 vector_ffe6
+#define vector_104 vector_ffe8
+#define vector_106 vector_ffea
+#define vector_108 vector_ffec
+#define vector_110 vector_ffee
+#define vector_112 vector_fff0
+#define vector_114 vector_fff2
+#define vector_116 vector_fff4
+#define vector_118 vector_fff6
+#define vector_120 vector_fff8
+#define vector_122 vector_fffa
+#define vector_124 vector_fffc
+#define vector_126 vector_fffe
+#elif INTERRUPT_VECTOR_SLOTS == 32
 #define vector_0  vector_ffc0
 #define vector_2  vector_ffc2
 #define vector_4  vector_ffc4


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