Re: Java Memory Model and ParallelStream
Luke Hutchison via Concurrency-interest <[email protected]>
| Newsgroups | gmane.comp.java.jsr.166-concurrency |
|---|---|
| Message-ID | <CAHLUFO=-15yZEHdmrAcpP1w7LgeGJd7=LokZ0k9-AvqWG7nhug@mail.gmail.com> |
On Fri, Mar 6, 2020, 7:15 AM Andrew Haley <[email protected]> wrote: > The CPU *hardware* does this all the time. Few processors have a > total store order: x86, which does, is the exception here. > Well that gets at my core question: whether a computational barrier always strictly enforces memory happens-before ordering across the barrier, i.e. whether a computational barrier is always also a memory ordering barrier. If the CPU does not have a total store order, I could imagine cases where a computational barrier does not enforce memory ordering. What am I missing? _______________________________________________ Concurrency-interest mailing list [email protected] http://cs.oswego.edu/mailman/listinfo/concurrency-interest