Re: [MLton] MLton on the bare metal or RTOS

Mlton doesn't use any paging tricks such as double mapping or tospace
traps, I believe. The source for most of the GC process can be found
here:

https://github.com/MLton/mlton/blob/master/runtime/gc/

We have this file:
https://github.com/MLton/mlton/blob/master/runtime/gc/virtual-memory.c

>From the look of things though, it uses the system's memmap and memcpy
and just checks alignment. I wouldn't worry about the lack of an MMU,
but I can't say for sure that there isn't some place that uses it. You
could try a "hello world" with Mlton, and we can tackle any issues as
they arise.

A few things about realtime/baremetal development:

The runtime makes use of GMP to offer IntInf. It's required even if
you don't use it. There's an initiative to offer an alternative. I'm
not sure how this might complicate things for you.
https://github.com/MLton/mlton/issues/59

If you're planning on targetting the arm board, I recommend using
Mlton's cross compiling feature set.

http://mlton.org/MLtonCross

- Alex

On Thu, Oct 2, 2014 at 8:21 AM, David Ireland <[email protected]> wrote:
> I'd like to use MLton to compile code for an ARM Cortex-M3 SOC. I'd like to
> develop in ML, rather than in C. I would use an existing RTOS and drivers to
> avoid real time requirements, so I could use a GC. The GC, and threads are
> the only parts of the runtime I would definitely need.
>
> I think there is probably only one crucial question: does the GC need an
> MMU? If its just case of needing to know the physical address of the heap
> and stack in advance that can probably be calculated. Also, I can protect
> memory regions to achieve a write barrier, if that's required.
>
> Cheers
> David
>
>
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