Re: [MLton] MLton on the bare metal or RTOS
Matthew Fluet <[email protected]> Fri, 3 Oct 2014 20:33:28 -0400
| Newsgroups | gmane.comp.lang.ml.mlton.devel |
|---|---|
| Message-ID | <CAMrhFL5FG9PHGEN-7uSXT-o1F+g0Lw6jtjChb6P9SrLRHHS1cQ@mail.gmail.com> |
On Thu, Oct 2, 2014 at 8:21 AM, David Ireland <[email protected]> wrote: > I'd like to use MLton to compile code for an ARM Cortex-M3 SOC. I'd like to > develop in ML, rather than in C. I would use an existing RTOS and drivers to > avoid real time requirements, so I could use a GC. The GC, and threads are > the only parts of the runtime I would definitely need. > > I think there is probably only one crucial question: does the GC need an > MMU? If its just case of needing to know the physical address of the heap > and stack in advance that can probably be calculated. Also, I can protect > memory regions to achieve a write barrier, if that's required. Luke Ziarek with students at UBuffalo have had MLton running under a RTOS (I think) and also running under some more exotic memory systems, so I suspect that he will be able to offer more specific advice. As Alex pointed out, MLton doesn't do anything particular fancy with regards to memory from the OS. We simply use mmap/munmap/mremap to get memory. MLton does want to find contiguous memory for heaps, but I expect that as you get closer to bare metal, you have less memory fragmentation. ------------------------------------------------------------------------------ Meet PCI DSS 3.0 Compliance Requirements with EventLog Analyzer Achieve PCI DSS 3.0 Compliant Status with Out-of-the-box PCI DSS Reports Are you Audit-Ready for PCI DSS 3.0 Compliance? Download White paper Comply to PCI DSS 3.0 Requirement 10 and 11.5 with EventLog Analyzer http://pubads.g.doubleclick.net/gampad/clk?id=154622311&iu=/4140/ostg.clktrk