Re: [RFC PATCH] LoongArch: Fix intermittent nptl/tst-cancel32 failure

Xi Ruoyao <[email protected]> Wed, 05 Aug 2026 11:33:27 +0800

Newsgroups	gmane.comp.lib.glibc.alpha
Message-ID	<[email protected]>

On Wed, 2026-08-05 at 10:09 +0800, mengqinggang wrote:
> =C2=A0
> Hi Wilco,
> =C2=A0
> I'm sorry, I don't think I fully understood your point.
> =C2=A0On LoongArch64:
> =C2=A0PTR_DEMANGLE2 (sp, t0, t1)=20
> expand to:
>=20
> rotri.d         $sp, $t0, 0x11
> xor             $sp, $sp, $t1
> =C2=A0
> =C2=A0The SP register is partially updated between the rotri.d and xor
> instructions.
> =C2=A0Using this value in the pthread_cancel path may cause a SIGSEGV.=
=20
> I think this issue is not relate to t0 register.

Meaning we can simply expand it to

rotri.d $t0, $t0, 0x11
xor     $sp, $sp, $t1

instead of introducing t2.  (With a comment for PTR_DEMANGLE2 saying it
will clobber the input in t0.)

--=20
Xi Ruoyao <[email protected]>