Re: [RFC PATCH] LoongArch: Fix intermittent nptl/tst-cancel32 failure

mengqinggang <[email protected]> Wed, 5 Aug 2026 11:47:09 +0800

Newsgroups	gmane.comp.lib.glibc.alpha
Message-ID	<[email protected]>

在 2026/8/5 11:33, Xi Ruoyao 写道:
> On Wed, 2026-08-05 at 10:09 +0800, mengqinggang wrote:
>>   
>> Hi Wilco,
>>   
>> I'm sorry, I don't think I fully understood your point.
>>   On LoongArch64:
>>   PTR_DEMANGLE2 (sp, t0, t1)
>> expand to:
>>
>> rotri.d         $sp, $t0, 0x11
>> xor             $sp, $sp, $t1
>>   
>>   The SP register is partially updated between the rotri.d and xor
>> instructions.
>>   Using this value in the pthread_cancel path may cause a SIGSEGV.
>> I think this issue is not relate to t0 register.
> Meaning we can simply expand it to
>
> rotri.d $t0, $t0, 0x11
> xor     $sp, $sp, $t1

Perhaps it should be:
rotri.d $t0, $t0, 0x11
xor     $sp, $t0, $t1

> instead of introducing t2.  (With a comment for PTR_DEMANGLE2 saying it
> will clobber the input in t0.)
>